1. Field of Invention
The present invention relates to a voltage level shifter apparatus. More particularly, the present invention relates to a voltage level shifter apparatus using dynamic-bias.
2. Description of Related Art
With the development of technology, and following the trend that current development of technical products is pursuing slightness, thinness, shortness, and small volume while providing increasingly stronger functionality, the power used by inner circuits of technical products has been reduced accordingly; furthermore, the quantity and variety of adopted circuits and integrated circuit chips have become greater than ever, so ultra low voltage level in circuits or integrated circuit chips often need to be shifted to higher voltage level for the applications of the advanced technologies. A voltage level shift circuit is an apparatus used for providing the necessary voltage level shift.
FIG. 1 shows a conventional voltage level shift circuit. Referring to FIG. 1, transistors 102 and 104 are transistor elements adopting thick oxide, which therefore may be properly driven by an input signal Vin with a larger value. However, since the input signal Vin is often provided from the inside of the integrated circuit chip and the level thereof becomes lower with the progress of integrated circuit processes. If transistors 102 and 104 adopt transistor elements using thick oxide, the case that the transistors 102 and 104 are incapable of being properly driven by the input signal Vin might arise, and thereby two output ends OUT and /OUT of the voltage level generator cannot generate an output signal and an inversion output signal properly. However, if the transistors 102 and 104 are changed to adopt transistor elements of thin oxide for the sake of receiving a low input signal, the transistor 102 is likely to be damaged due to a voltage, between the output end /OUT and a ground voltage GND, which exceeds the voltage that the transistor 102 itself can endure; similarly, the transistor 104 may also be damaged due to a voltage, between the output end OUT and the ground voltage GND, which exceeds the voltage that the transistor 104 itself can endure. And thus, the output of the voltage level shift circuit becomes very unstable and therefore such a method is not suitable. To eliminate the above-mentioned defect, a circuit as shown in FIG. 2 was developed.
FIG. 2 shows a conventional voltage level shift circuit. Referring to FIG. 2, differences between FIG. 1 and FIG. 2 lie in that in FIG. 2 the input transistors are changed to adopt transistor elements of thin oxide (i.e. transistors 202 and 204 as shown in FIG. 2 respectively), and a native transistor 206 is additionally series-connected between the output end /OUT and the transistor 202, and a native transistor 208 is also additionally series-connected between the output end OUT and the transistor 204. U.S. Pat. No. 6,650,168 and U.S. Pat. No. 6,803,801, which are conventional technologies adopting such a technique, both adopt native transistors in the voltage level shift circuits published therein.
Further, some additional conventional technologies replace the above native transistors with general transistors, for example, U.S. Pat. No. 6,700,407 and U.S. Pat. No. 6,924,689, etc. In these conventional technologies, fixed-level bias signals (e.g., Vb in FIG. 2) are typically needed for biasing the transistors (e.g., the transistors 206 and 208 in FIG. 2), such that the voltage across the input transistors will not be excessively high.
FIG. 3 shows a conventional voltage level shift circuit. Referring to FIG. 3, the figure illustrates U.S. Pat. No. 6,700,407 filed by the Japanese National Corporation. It can be clearly seen from the drawing that this conventional technology provides a bias signal VR having a fixed level by using a reference voltage generator 302. Since the fixed bias signal maintains the transistor in a biased state, a certain degree of stand-by leakage will be generated, which consumes more electric energy.
FIG. 4 shows a conventional voltage level shift circuit. Referring to FIG. 4, which shows U.S. Pat. No. 6,924,689 disclosed by LSI Corporation, it can be clearly seen from the drawing that a circuit block 402 shown therein is adopted also for generating the above bias signal, and operational amplifiers (OPAMPs) 404 and 406 are used in the circuit block 402 for comparing signals in order to obtain a more precise bias signal. However, a bandgap reference voltage 408 must be further provided at a positive input end of the OPAMP 404, therefore, those who desire to adopt this circuit have to further provide a circuit for generating the bandgap reference voltage. Moreover, since a bias signal also needs to be additionally provided for the OPAMPs 404 and 406 themselves for an operation, a leakage phenomenon will occur.
Additionally, since a negative input end of the OPAMP 406 is still coupled to one of the source/drain ends of the transistor 410 (a feedback path as shown by 412) to form a feedback, although this circuit block 402 provides a precise bias signal, the whole operating speed is lowered due to the use of feedback. Furthermore, such a bias signal is still a fixed-type one and therefore still generates stand-by leakage such that more electric energy will be consumed.
Therefore, in the conventional technologies as described above, since only the fixed bias signal may be provided, the transistor for receiving the bias signal will always be presented in a biased on state and generate the leakage, and thereby more power will be consumed and more heat energy will be generated. Thus, all technical products which apply a voltage level shift circuit are negatively influenced.